With recent advancements in imaging technologies, there is an increasing demand for on-chip codecs in image capturing and display devices that can handle compression and storage of different images or video in wide variety of image resolutions (e.g., low to high resolution images/video). Currently, an image or video may be subjected to multiple coding techniques, for example, transform coding, residual prediction, quantization, entropy coding, refinement, and the like, to achieve a desired compression. Typically, at decoding stage, a middle value of a quantization bin is utilized to decode the encoded image or video. In certain scenarios, the input pixel values in different image blocks of the image or video may lie in different numeric ranges within a quantization bin. For example, for a quantization bin of “0-31” bin size, the pixel values may be in a numeric range of “0-10” in one image block and “20-31” in another image block. In such scenarios, the reconstruction of each image block of the encoded image or video in accordance with the middle value of the quantization bin may significantly increase the quantization error due to a large difference in reconstructed value and input pixel value. This may not only result in visible image artifacts, but may also lead to compression inefficiency and sub-optimal memory usage, especially in on-chip codes where it is desirable to achieve an area efficiency with respect to throughput while minimizing an on-chip memory usage.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one skill in the art, through comparison of described systems with some aspects of the present disclosure, as set forth in the remainder of the present application and with reference to the drawings.